Schematic-informed placement

Published

September 11, 2023

Written by

Sergiy Nesterenko

Founder and CEO

Read the Full Series

This article is one part of a walkthrough detailing how we recreated an NXP i.MX 8M Mini–based computer using Quilter’s physics-driven layout automation.

Overview: Project Speedrun

Part 1: Preparing the Design

Part 2: Compiling the Design

Part 3: Cleaning Up the Design

Part 4: Testing & Validation

Quilter users can now upload their schematic along with their board file to Quilter for compilation, enabling components that are directly and implicitly connected in the schematic to be placed together in layout.

More logical component placement should result in easier design comprehension and debugging.

To take advantage of schematic-informed placement, simply upload your root schematic along with your board file using the same name as your board.

This feature is available today for KiCAD designs, with Altium coming soon.

Update: Altium support added in release v0.5.0 (10/11/23).

Try Quilter for Yourself

Project Speedrun demonstrated what autonomous layout looks like in practice and the time compression Quilter enables. Now, see it on your own hardware.

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Validating the Design

With cleanup complete, the final question is whether the hardware works. Power-on is where most electrical mistakes reveal themselves, and it’s the moment engineers are both nervous and excited about.

Continue to Part 4

Cleaning Up the Design

Autonomous layout produces a complete, DRC'd design; cleanup is a brief precision pass to finalize it for fabrication.

Continue to Part 3

Compiling the Design

Once the design is prepared, the next step is handing it off to Quilter. In traditional workflows, this is where an engineer meets with a layout specialist to clarify intent. Quilter replaces that meeting with circuit comprehension: you upload the project, review how constraints are interpreted, and submit the job.

Continue to Part 2