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Project Speedrun: The First Computer Designed by Physics-Driven AI
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A single engineer designed a working computer with Quilter’s physics-driven AI in less than a week. Manual layout of the same system was quoted at a full quarter of work.
Compress One Quarter Into One Week
10x Your Hardware R&D Speed
With Quilter, one engineer finished the two-board system in 38.5 hours of cleanup: 12 hours on the baseboard against a 238-hour manual quote, and 26.5 hours on the SOM against a 190-hour quote. In total, 38.5 hours of human work replaced 428 hours of quoted manual layout.
You move from quarterly layout cycles to weekly iteration loops, so every board becomes a chance to test, learn, and refine the design before a respin.
Automation Does the Layout. The Engineer Stays in Control.
We based the System-on-Module (SOM) and baseboard on the NXP i.MX 8M Mini evaluation platform. Staff Electrical Engineer Ben Jordan prepared the design and constraints and submitted the jobs. Quilter ran parallel seeded runs with varied constraints and returned multiple ranked candidates, completing the layout in 27 hours.
Quilter handled the repetitive work while the engineer stayed in control. Automation took care of placement, routing, and physics checks, which freed him to focus on firmware prep, documentation, and constraint refinement. Supply-chain changes were easy to absorb: a few connectors went out of stock and a Wi-Fi module was dropped, and each was handled in a new run with no delay to iteration. Cleanup was minimal, limited to PDN pours, via clusters, and minor footprint swaps, with no rip-ups and no respins.
Running the Design Through Quilter
Project Speedrun proves Quilter’s physics-driven AI has crossed from concept to capability.
Core Architecture
Results
Human Design Hours with Quilter
38.5 hours
• Baseboard: 12 hours
• SOM: 26.5 hours
Human Design Hours without Quilter
428 hours
• SOM: 190 hours
• Baseboard: 238 hours
Quilter Runtime
27 hours (placement + routing + physics validation)
Routing Completion
98%
Validation Result
Ran Linux with DDR4, Ethernet, USB, HDMI, and graphics, including hardware-accelerated Chrome and gaming, with no respins.
Technical Specifications: What Quilter Actually Built
This project shows Quilter placing and routing the kind of dense embedded computing hardware found in automotive infotainment, safety, and machine-vision systems.
Core Architecture
Processor
NXP i.MX 8M Mini Quad (4 × Cortex-A53 @ 1.8 GHz)
Memory
2 GB LPDDR4 (32-bit bus width)
Storage
32 GB eMMC 5.1 (upgraded from 16 GB reference part)
Flash Memory
32 MB QSPI NOR Flash
Audio
24-bit / 192 kHz DAC, 3.5 mm headphone jack
Networking
10 / 100 / 1000 Mbps Ethernet
Expansion
M.2 connector supporting PCIe
Board Design
Form Factor
Two-board system: System-on-Module (SOM) + Baseboard
PCB Stack-Up
8-layer HDI architecture, manufactured by Sierra Circuits
Trace / Space Geometry
2 mil (SOM) / 3.5 mil (Baseboard)
Component Count
843 total
Pin Count
5,141 total
Placement & Routing
Placed and routed by Quilter
Dive Deeper
Follow the full build, from constraint setup to manufacturing, in the six-part engineering series.
Manufactured and Assembled with Sierra Circuits
We partnered with Sierra Circuits for fabrication and assembly. The baseboard ran on a standard 3-day fab and 3-day assembly schedule. The SOM’s 2 mil HDI geometry needed a longer lead time on Sierra’s advanced HDI line. We paid standard commercial rates, used the same ordering process available to any customer, and got no special treatment, which means anyone can reproduce these results with off-the-shelf services.
Preparing an AI-Designed Computer
Before Quilter generates a layout, you prepare the design: define the constraints, set the floor plan, and make the structure explicit. The first post in the series walks through that preparation step in detail.
Continue to Part 1
